Workflow

1. Review and finalize the SCH file in Eeschema

Make sure to check for any open connections

Check that all symbols have a footprint assigned

2. Perform schematic electrical rules check

Run the schematic electrical rules check, look for any relevant errors 

Some errors can be ignored:

• no pin to drive it

• global label not connected

3. Generate then read netlist

At this time generate a PDF view of the schematic

4. Review and finalize the kicad_pcb file in Pcbnew

Run the design rules check

Ensure the name and rev are labeled on the board

Add board dimensions on the F.Fab layer

5. Generate and review drill map

Go to Plot->Generate Drill Files... and Generate Drill File, Map File, and Report File

Check for any unnecessary drill size differences and consolidate

Move the drl_map PDF files up one directory from the GERB folder

6. Generate artwork

Go to "Print board" and print 1 page per layer for all relevant layers

7. Generate FAB file using FreeCAD

8. Generate Gerber files

Delete any existing files in the folder before plotting the new files

Use Protel filename extensions

Required Layers: F.Cu, B.Cu, F.Paste, B.Paste, F.SilkS, F.Mask, B.Mask, Edge.Cuts

Optional: B.SilkS

9. Review the Gerber files in the Gerber viewer

Last check for errors, check to make sure Gerber and drill files are aligned correctly

10. Zip the GERB folder along with ARTWORK, FAB, and DRL files.

Optional

Assembly instructions should be built into silkscreen and fab layers

All SMD components should be marked as SMD

Pick and place file

BOM

Solder paste stencils